module tb_forward_filter;

parameter length = 16;

reg signed [length-1:0] IS0;
reg signed [length-1:0] IS1;
reg signed [length-1:0] IS2;
reg signed [length-1:0] IS3;
reg signed [length-1:0] IS4;
reg signed [length-1:0] IS5;
reg signed [length-1:0] IS6;
reg signed [length-1:0] IS7;
reg signed [length-1:0] IS8;
reg signed [length-1:0] IS9;
reg signed [length-1:0] IS10;
reg signed [length-1:0] IS11;
reg signed [length-1:0] IS12;
reg signed [length-1:0] IS13;
reg signed [length-1:0] IS14;
reg signed [length-1:0] IS15;
reg signed [length-1:0] IS16;
reg signed [length-1:0] IS17;
reg signed [length-1:0] IS18;
reg signed [length-1:0] IS19;
reg signed [length-1:0] IS20;
reg signed [length-1:0] IS21;
reg signed [length-1:0] IS22;
reg signed [length-1:0] IS23;
reg signed [length-1:0] IS24;
reg signed [length-1:0] IS25;
reg signed [length-1:0] IS26;
reg signed [length-1:0] IS27;
reg signed [length-1:0] IS28;
reg signed [length-1:0] IS29;
reg signed [length-1:0] IS30;
reg signed [length-1:0] IS31;

reg signed [length-1:0] W0;
reg signed [length-1:0] W1;
reg signed [length-1:0] W2;
reg signed [length-1:0] W3;
reg signed [length-1:0] W4;
reg signed [length-1:0] W5;
reg signed [length-1:0] W6;
reg signed [length-1:0] W7;
reg signed [length-1:0] W8;
reg signed [length-1:0] W9;
reg signed [length-1:0] W10;
reg signed [length-1:0] W11;
reg signed [length-1:0] W12;
reg signed [length-1:0] W13;
reg signed [length-1:0] W14;
reg signed [length-1:0] W15;
reg signed [length-1:0] W16;
reg signed [length-1:0] W17;
reg signed [length-1:0] W18;
reg signed [length-1:0] W19;
reg signed [length-1:0] W20;
reg signed [length-1:0] W21;
reg signed [length-1:0] W22;
reg signed [length-1:0] W23;
reg signed [length-1:0] W24;
reg signed [length-1:0] W25;
reg signed [length-1:0] W26;
reg signed [length-1:0] W27;
reg signed [length-1:0] W28;
reg signed [length-1:0] W29;
reg signed [length-1:0] W30;
reg signed [length-1:0] W31;
reg signed [length-1:0] expect_result;
wire signed [length-1:0] error_distance;

wire signed [2*length+4:0] parallel_compressor_out;

forward_filter
	#(length)
	forward_filter_u0
	(
		.IS0		(IS0		),
		.IS1		(IS1		),
		.IS2		(IS2		),
		.IS3		(IS3		),
		.IS4		(IS4		),
		.IS5		(IS5		),
		.IS6		(IS6		),
		.IS7		(IS7		),
		.IS8		(IS8		),
		.IS9		(IS9		),
		.IS10		(IS10		),
		.IS11		(IS11		),
		.IS12		(IS12		),
		.IS13		(IS13		),
		.IS14		(IS14		),
		.IS15		(IS15		),
		.IS16		(IS16		),
		.IS17		(IS17		),
		.IS18		(IS18		),
		.IS19		(IS19		),
		.IS20		(IS20		),
		.IS21		(IS21		),
		.IS22		(IS22		),
		.IS23		(IS23		),
		.IS24		(IS24		),
		.IS25		(IS25		),
		.IS26		(IS26		),
		.IS27		(IS27		),
		.IS28		(IS28		),
		.IS29		(IS29		),
		.IS30		(IS30		),
		.IS31		(IS31		),

		.W0			(W0			),
		.W1			(W1			),
		.W2			(W2			),
		.W3			(W3			),
		.W4			(W4			),
		.W5			(W5			),
		.W6			(W6			),
		.W7			(W7			),
		.W8			(W8			),
		.W9			(W9			),
		.W10		(W10		),	
		.W11		(W11		),	
		.W12		(W12		),	
		.W13		(W13		),	
		.W14		(W14		),	
		.W15		(W15		),	
		.W16		(W16		),	
		.W17		(W17		),	
		.W18		(W18		),	
		.W19		(W19		),	
		.W20		(W20		),	
		.W21		(W21		),	
		.W22		(W22		),	
		.W23		(W23		),	
		.W24		(W24		),	
		.W25		(W25		),	
		.W26		(W26		),	
		.W27		(W27		),	
		.W28		(W28		),	
		.W29		(W29		),	
		.W30		(W30		),	
		.W31		(W31		),	

		.parallel_compressor_out (parallel_compressor_out)
		);

error_compute
	#(length)
	error_compute_u0
	(
		.expect_result				(expect_result				),
		.parallel_compressor_out	(parallel_compressor_out	),			
		.error_distance				(error_distance				)
	);


initial begin
	IS0	 = 0;		
	IS1	 = 0;		
	IS2	 = 0;		
	IS3	 = 0;		
	IS4	 = 0;		
	IS5	 = 0;		
	IS6	 = 0;		
	IS7	 = 0;		
	IS8	 = 0;		
	IS9	 = 0;		
	IS10 = 0;			
	IS11 = 0;			
	IS12 = 0;			
	IS13 = 0;			
	IS14 = 0;			
	IS15 = 0;			
	IS16 = 0;			
	IS17 = 0;			
	IS18 = 0;			
	IS19 = 0;			
	IS20 = 0;			
	IS21 = 0;			
	IS22 = 0;			
	IS23 = 0;			
	IS24 = 0;			
	IS25 = 0;			
	IS26 = 0;			
	IS27 = 0;			
	IS28 = 0;			
	IS29 = 0;			
	IS30 = 0;			
	IS31 = 0;
	W0	= 0;
	W1	= 0;			
	W2	= 0;			
	W3	= 0;			
	W4	= 0;		
	W5	= 0;			
	W6	= 0;			
	W7	= 0;			
	W8	= 0;			
	W9	= 0;			
	W10	= 0;		
	W11	= 0;		
	W12	= 0;		
	W13	= 0;		
	W14	= 0;		
	W15	= 0;		
	W16	= 0;		
	W17	= 0;		
	W18	= 0;		
	W19	= 0;		
	W20	= 0;		
	W21	= 0;		
	W22	= 0;		
	W23	= 0;		
	W24	= 0;		
	W25	= 0;		
	W26	= 0;		
	W27	= 0;		
	W28	= 0;		
	W29	= 0;		
	W30	= 0;		
	W31	= 0;	
	expect_result = 0;			
	#20
	IS1=-5;
	W1=5;
	expect_result = 5;
	#1
	$display("%d %b",error_distance,error_distance);
	#50
	IS1=0;
	W1=0;
	IS0=-2;
	W0=4;
	expect_result = 9;
	#1
	$display("%d %b",error_distance, error_distance);


end
endmodule
